/* SPDX-License-Identifier: GPL-2.0+ */
/* Copyright 2023-2024 NXP */

#ifndef __PHY_FSL_LYNX_H_
#define __PHY_FSL_LYNX_H_

enum lynx_lane_mode {
	LANE_MODE_UNKNOWN,
	LANE_MODE_1000BASEX_SGMII,
	LANE_MODE_1000BASEKX,
	LANE_MODE_2500BASEX,
	LANE_MODE_QSGMII,
	LANE_MODE_10G_QXGMII,
	LANE_MODE_USXGMII,
	LANE_MODE_10GBASER,
	LANE_MODE_10GBASEKR,
	LANE_MODE_MAX,
};

#endif /* __PHY_FSL_LYNX_H_ */
